Application of Generalized Linear Models to Predict Semiconductor Yield

• Activity Number: 420
• Type: Contributed
• Date/Time: Tuesday, July 31, 2012 : 2:00 PM to 3:50 PM
• Sponsor: Quality and Productivity Section
• Author(s): Wenjun Ke*+
• Companies: Arizona State University
• Keywords: Generalized linear models ; Logistic regression ; Semiconductor yield ; Effect size

Abstract

This paper presents a methodology to forecast semiconductor manufacturing yield loss using generalized linear mixed models based on defect metrolgy data. This technique yields results at both the die and the wafer levels. The process to be modeled is product failure. We consider manufacturing lot as a random effect, with wafer and die observations correlated within lot. An example of 23296 die (observation unit) are used in the model building and 11445 die are used for model validation. The purpose of this paper is to discuss these approaches. In addition, we calculate power estimates and sample size requirements for fixed effects corresponding to wafer location, die quadrant, radial distance and manufacturing layer, depending on magnitude of the random effect. We focus on power calculations for the GLIMMIX model with correlated binary outcomes to detect the change of effect size.