Abstract #302017

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JSM 2003 Abstract #302017
Activity Number: 169
Type: Contributed
Date/Time: Monday, August 4, 2003 : 2:00 PM to 3:50 PM
Sponsor: Section on Quality & Productivity
Abstract - #302017
Title: Statistical Aspects of VLSI Yield Modeling
Author(s): Emmanuel Yashchin*+ and Asya R. Takken and Mary Wisniewski
Companies: IBM Corporation and IBM and IBM Research Division
Address: Dept. of Math Sciences, Yorktown Heights, NY, 10598,
Keywords: defect rate ; semiconductor ; manufacturing ; reliability
Abstract:

This paper discusses the problem of yield modeling in multilayer structures. Defects observed at various layers are categorized by type, size, and other characteristics. At the end of the process, the structure is viewed as a collection of chips that are subject individually to a final test. Given the above information about individual defects and final test results, we address a number of statistical issues, such as (a) estimation of defect rates based on partial data, (b) estimation, for every defect, of the probability of it turning out to be the "chip-killer," and (c) final yield estimation. A number of examples are given to illustrate the proposed approach.

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