Chip Placement Design in Capacitive Proximity Communication

• Activity Number: 131
• Type: Contributed
• Date/Time: Monday, August 5, 2013 : 8:30 AM to 10:20 AM
• Sponsor: Section on Physical and Engineering Sciences
• Author(s): Yu-Jung Huang*+
• Companies: I-Shou University
• Keywords: response surface ; optimal chip placement ; proximity communication

Abstract

3D IC integration techniques enable implementing circuit systems in 3D structures by stacking multiple dies vertically. For a 3DICs-implementation the difficulty of handling the increased amount of interconnects between separate chips arises. In Proximity Communication, chip-to-chip communication is based on capacitive coupling and requires neither solder nor wires. Capacitive AC coupled interconnect (ACCI) can be used to directly couple signals in 3D packaging and to communicate information between multiple ICs. The arrangement and geometry of the I/O pad are the main factors that directly affect the transmission gain and crosstalk effects. The objective of this study is to search the placement achieving the optimal signal quality. The signal transmission gains of the capacitive coupling pads are simulated using the High Frequency Structure Simulator (HFSS) tool. We analyze the chip physical placement effect on the signal transmission gain and quality. The optimal placement is obtained based on the response surface methodology and a finite element modeling technique. The results enable the prediction and optimization of data-link-coupling performance under various pad arrangement.